IT8152G |
RFQ for IT8152G Required Field |
 |
| Product | Manufacturers | Pack | D/C |
| IT8152G | - | - | - |
The IT8152, an advanced RISC-to-PCI companion chip that supports SA1110 32-bit RISC microprocessor interface, is especially designed for the main applications in Datacomm, Telecomm, and Internet Appliances and Networking devices. This companion chip interfaces directly to RISC processors, and provides a bridge to link host bus and PCI bus. It also provides a Shared Memory (SDRAM) Controller, Low Pin Count (LPC) Host Controller, Interrupt Controller, DMA Controller, Timers, USB Host Controller, Digital AC'97 Controller, GPIO Controller and Power Management.
Paired with Intel's SA1110 RISC microprocessor interface, the IT8152 provides a low cost, high performance host to PCI bridge function for any system applications in Datacomm/Telecomm products.
The IT8152 is available in two packages: 208-pin PQFP and 208-pin LBGA.
Features |
| CPU Interface- Supports INTEL StrongArm Series SA1110 32-bit RISC microprocessor interfaceShared SDRAM Controller- Supports 16Mb, 64Mb, 128Mb, 256Mb SDRAM- Supports up to 64MB Memory- 32-bit data bus interface- Supports one bank of SDRAM shared with SA1110 microprocessor interface SDRAM controller- Provides deep levels of PCI to SDRAM buffers for burst transfer- Up to 96 MHz bus operationPCI Bus Controller- 32-bit data bus interface- Supports PCI rev. 2.1 specification- Provides CPU to PCI buffers for burst transfer- PCI bus arbiter built in- Supports up to 4 individual external bus master devices- Supports CLKRUN# signal function- 33 MHz bus operationInterrupt Controller- Supports one maskable interrupt to RISC processor- Interrupt order is controlled by software- Registers support interrupts masking and unmaskingChaining DMA Controller- Four independent software DMA channels- Supports chaining mode and non-chaining mode- Supports both PCI memory address and I/O address- Supports rotating and fixed priority types- Supports DMA transfers of unaligned addressTimers- 4-channel 24-bit auto-reloaded timer with pre-scale (1,1/16,1/256) for dividing CPU clock- Supports the interrupt generation whenever the timer's count reaches 0Low Pin Count (LPC) Host Controller- Compliant with Intel LPC Interface Specification Rev. 1.0 (Sept. 29, 1997)- Supports Serial IRQ Protocol- Shared with GPIO pins& |
